Electrical and Electronic Engineering - Theses

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End date: 1999 × Start date: 1990 × Type: Masters Research thesis × Subject: computer networks ×

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    The design of an interface between a hardware ATM cell-stream splitter and the system bus of an experimental B-ISDN terminal
    Liew, Selbyn ( 1992)
    As worldwide standards on global networking and B-ISDN (Broadband Integrated Services Digital Network) are developed and increasing in detail and clarity, the stage is set for an advancement towards standardised high-speed global networking. With the enormous transmission bandwidth available through the use of optical communications technology, it is equally important that new applications are developed to make this worthwhile and to meet the demand and supply of communication needs today, which are calling for the increase of both volume and sophistication. In response to the imminent deployment of B-ISDN in the future, an experimental B-ISDN terminal is being developed in this department with a view to eventually provide an integration of video, voice and data communication services. This has been made possible with the CCITT adoption of Asynchronous Transfer Mode (ATM) as the basis for B-ISDN, which provides the flexibility to accommodate a variety of services with varying bit-rates. The work treated in this thesis is a continuation of this B-ISDN terminal project and is specifically targeted at completing the design of a hardware ATM cell-stream splitter to sort out ATM cells so that different cell types may be directed appropriately to where they are to be processed. The work here aims at completing the interface of the hardware splitter to the system bus of the computer workstation being used as the experimental terminal. A fair amount of attention has also been given to the use of the XC4000 Field Programmable Gate Array (FPGA) technology provided by Xilinx Inc.. The use of FPGAs has been a chief feature of the work on the hardware splitter.